The Read ROM command

9 May

The Read ROM command: The Read ROM command can be represented on the bus by either 33h or 0Fh. The reason there are two different bytes representing the same command has to do with maintaining backward compatibility with earlier devices like the DS2400 (which is an earlier version of the DS2401 and is no longer available). The Read ROM command only works if there is one device on the bus. When the master issues the read ROM command, the DS2401 slave will respond with its 64-bit ID. That ends the process. The only function of the DS2401 is to supply that unique ID code. The Read ROM command also works with all other 1-Wire devices in the same fashion. When issued to them, while they are alone on the bus, they will respond with their 64-bit ID code. What happens when there is more than one device on the bus and a Read ROM is issued? They all respond with their 64-bit ID code at the same time. Since the bus is open collector, the output of all the devices is ANDed together, and the master has no idea of what the ID code really is. It thinks there is one device on the bus. To find out the ID code of a device when there are multiple devices on the bus, the master needs to issue a Search ROM command.

Figure 10-9: DS2401 command flow chart

The Search ROM command
The Search ROM command, represented by F0h on the bus, is used when there are multiple devices on the bus. When the bus master issues a Search ROM command, that tells all the 1-Wire slave devices to prepare for an algorithm involving the process of elimination. It goes like this:

1)  All the 1-Wire slave devices put the least significant bit (bit0) of their 64-bit ID code on the bus all at once.

2)  Then, the very next data time slot, they put the opposite of their least significant bit (Nbit0) on the bus, all at once.

3)  Then, in the next data time slot, the bus master writes a bit. Those devices that match the bit written by the master remain active, those that don’t are effectively deselected and no longer participate. They remain deselected until a reset pulse is issued.

Since the bus is open collector, when the different devices try to write a 1 and a 0 at the same time, the result is a wired AND. This means that the only way the bus can be pulled high by the pull-up resistor is if ALL devices on the bus are trying to write a 1. If any device is trying to write a 0, the bus is pulled low. With this in mind, there are four possibilities as the result of the 1-Wire slaves writing bitn and Nbitn. In the discussion below, bitn is the nth bit of the 64-bit ID code, starting with 0 and going up to 63, and Nbitn is the opposite of that bit. The values of bitn and Nbitn are what the bus master will see—that is, the wired AND result of numerous devices talking at once and putting different data on the bus.

Case 1: bitn=0, Nbitn=0
This can only happen if two or more devices are trying to write different values to the bus at the same time. This tells the bus master that, at this bit position, there is an address conflict that indirectly tells the bus master that there are at least two devices remaining on the bus at this point in the process.

Case 2, and Case 3: bitn=0, Nbitn=1 or bitn=1, Nbitn=0
This can only happen if all the devices on the bus are trying to write the same data at the same time. This tells the bus master that the value for this bitn is equal to the value on the bus, but it does not give the master any insight as to how many devices are on the bus.

Case 4: bitn=1, Nbitn=1
The only way this can happen is if there are NO devices responding on the bus. The bus master performs the sequence of two reads and a write, from bit0 on up to bit63 and after each case, makes note of the bit position of any conflicts. Conflicts correspond to case 1, above. It also uses this conflict information to decide whether or not to write a 1 or a 0. The bus master always writes a bit after the two reads, and in conflict situations (case 1) , this always has the effect of removing the conflict devices whose bitn did not match the bit written. Upon reaching bit63, the master knows the 64-bit ID code of one of the devices. By repeating the entire 64-bit process (64 cycles of reading two bits and writing one bit) again and again until all of the conflicted bit positions have been resolved, all devices will be identified.

So, if on bitn, it is determined that there is no conflict, (Case 2) then all devices that are active on the bus agree on the value of bitn in their 64-bit ID code. So we know their value of bitn. We say active, because within any 64-bit cycle, some devices may have been deselected. If there was a conflict, (case 1) and it’s the first time we’ve encountered this conflict, the master will write a 0 and remember this position. 1- Wire slaves that have bitn = 1 in their 64-bit ID code are removed from this 64-bit cycle. The master will dedicate a later 64-bit cycle to resolving the conflict in this bit position by returning and writing a 1, thereby deselecting the devices that previously remained active and selecting the devices that didn’t. You can think of each bit in the 64-bit ID code as being branch points in a binary tree. The Search ROM process is an iterative process of traversing and mapping the entire tree.

Each of these 64 -bit cycles begins with a reset pulse from the bus master, followed by a presence pulse from all 1-Wire slaves, at the same time. The master then reissues the Search ROM command. All of the devices write bit0 and Nbit0 at the same time, but after that point, the master uses its one bit write to take different paths through the branches of the binary tree by selecting/deselecting different groups of devices. Old bit conflicts are resolved, new bit conflicts are remembered and later resolved on a subsequent pass. Each complete pass identifies an additional device’s ID code. The bus master makes as many passes as there are devices on the bus. So, if there are 12 (for example) 1-Wire slave devices on the bus, this method identifies all of their unique 64-bit ID codes in exactly 12 64-bit search ROM passes.

The bus master can also insert a measure of optimization in the Search ROM command. For instance, if it’s only interested in identifying the DS2401 devices on the 1-Wire bus, it can use that fact to speed up the process and limit its search to just DS2402 Silicon Serial Numbers. The first eight bits of the ROM ID for any 1-Wire device will be its family code. That will be the same for all 2401 devices. So, when performing the search ROM command, the bus master can use the family code byte during the first 8 cycles of the 64-cycle Search ROM process and not even pay attention to the values of bitn and Nbitn being written. By doing so, all other non- DS2401 devices are eliminated from consideration right off the bat. The only devices on the bus remaining when the ninth ROM bit is being processed will be DS2401 devices. To use our binary tree analogy, any branches that would have occurred during the first eight bits aren’t going to be explored. In 1-Wire jargon, this is “targeting the family.” The Read ROM and Search ROM commands are found in all 1-Wire slave devices. Additional ROM commands found in most 1-Wire devices are Match ROM and Skip ROM.

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